Qualifications of Principal Hardware Design Engineer:

Minimum of 10 years of experience in developing board level hardware and systems

Demonstrated leader in guiding junior HW engineers.

Proven success in taking at least one system product from concept to production.

Experience in high-speed interface design

Experience with schematic capture software (CONCEPT / ALLEGRO).

Good communication especially in creation of plans and reports.

Familiarity with volume manufacturing methods and processes is a plus.

Ability to lead and contribute to cross-functional teams, demonstrate good interpersonal skills, be able to operate independently and multiplex your time between many diverse tasks.

Bachelor degree in Electrical Engineering.

Qualifications of Principal Verification Engineer:

7-10+ years of relevant experience. Degree in Electrical or Computer Engineering, graduate level or compensating experience.

Fluent in System Verilog and UVM methodologies.

Sound working experience with Port Arbitration ASIC and SerDes PHY

Working knowledge of PCIe 2.0 & AMBA protocols.

Experience in verifying DDR3/DDR4 interfaces.

Prior Working experience with VIP portfolio IP.

Scripting experience in PERL, Python, and Shell required, C/C++ preferred.

Expert level knowledge of EDA Functional simulators - Incisive/VCS.

Prior experience with Error Injection based verification preferred.

Demonstrated technical abilities and capable of leading and solving technical challenges. Ability to work cross-functionally.

Energetic. Self-driven. Good communication, organization, analytical, people, project planning, and leadership skills.

Proven success in development of complex custom ASIC products in advanced process nodes preferably FINFET technologies.

Qualifications of Senior Principal Design Engineer:

At least 10 years of relevant experience. 

Degree in Electrical or Computer Engineering, graduate level or compensating experience.

Proven success in development of complex ASIC, FPGAs and products.

Demonstrated capability to design major blocks involving ASIC, IPs, logic, and FPGAs.

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