Engineer, Principal

TSMC Technology San Diego, CA Full-time

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Engineer, Principal for ASIC & CPU macros’ physical design & verification, tapeout, standard cell simulation & extraction, high speed low power layout, power optimization benchmark & CAD flow improvement for DFM for 7nm or below chips. Work site in San Diego, CA. Send resume to TSMC Technology, Inc., 2851 Junction Ave., San Jose, CA 95134.

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TSMC Technology

San Diego, CA