ENGINEERING Design Engineer (F-T; 3 positns) needed in Santa Clara, CA to dvlp test cases. Prep eng'g sketches. Perform simulation & providing verificatn support. Must have Master's (or foreign equiv) in Comp Sci, Electrical Eng'g, Electronics Eng'g, Eng'g (any), or rel. field, plus 1 yr Eng'g exp using PERL, C-Shell, & TCL. We will also accept Bachelor's (or foreign equiv) in Comp Sci, Electrical Eng'g, Electronics Eng'g, Eng'g (any), or rel. field, plus 5 yrs progressive post-Bachelor's exp in Eng'g field. 1 yr of the 5 yrs of progressive post-Bachelor's exp in Eng'g field must incl exp using PERL, C-Shell, & TCL. All exp may be acquired concurrently. Send resumes to Esencia Technologies Inc, 2350 Mission College Blvd, Suite 490, Santa Clara, CA 95054; Ref: 01ET; EOE